1,575
edits
Changes
no edit summary
## Flash_A_pin, O, [9:29]
## Flash_Rdy_pin, I
# Create the following connections between the 3 Cores & External Ports we just created.
## Connect Flash_Mem/Mem_A to Flash_A_Bus_Split/Sig
## Connect Flash_Mem/Mem_RPN to External Ports/Flash_RPN_pin## Connect Flash_Mem/Mem_CEN to External Ports/Flash_CEN_pin## Connect Flash_Mem/Mem_OEN to External Ports/Flash_OEN_pin## Connect Flash_Mem/Mem_WEN to External Ports/Flash_WEN_pin## Connect Flash_Mem/Mem_DQ to External Ports/Flash_DQ_pin## Connect Flash_Rdy/GPIO_IO_I to External Ports/Flash_Rdy_pin## Connect Flash_A_Bus_Split/Out1 to External Ports/Flash_A_pin
[[Category:VHDL]]
[[Category:Microblaze]]
[[Category:EDK]]
