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## Leave all other Properties as they are. Most are ignored.
# Add a UTIL_BUS_SPLIT Core. In this case I have named it Flash_A_Bus_Split. Ensure that the properties match those shown below.
#:: [[File:Util_bus_split-prop-user-all.png]]
# Add an XPS_GPIO Core. In this case I have called it Flash_Rdy.
## Open the Properties sheet, navigate to the User tab and ensure that the Common properties match those shown below.
## Connect Flash_Rdy/GPIO_IO_I to External Ports/Flash_Rdy_pin
## Connect Flash_A_Bus_Split/Out1 to External Ports/Flash_A_pin
#* The following image shows all of the connections between the External Ports, Flash_Mem (XPS_MCH_EMC), Flash_Rdy (UTIL_BUS_SPLIT), & Flash_Rdy (XPS_GPIO).
#: [[File:32-bit_Flash_Example_Ports.png]]
[[Category:VHDL]]
[[Category:Microblaze]]
[[Category:EDK]]
