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#* The following image shows all of the connections between the External Ports, Flash_Mem (XPS_MCH_EMC), Flash_Rdy (UTIL_BUS_SPLIT), & Flash_Rdy (XPS_GPIO).
#: [[File:32-bit_Flash_Example_Ports.png]]
# In the Addresses tab, ensure that the Flash_Mem Size is set to 8M.
# The UCF file should include the following entries (your LOC values will be different).
#* Note that the DQ pins are in reverse order when compared to the Atmel Flash datasheet. This must be done to overcome a Big Endian/Little Endian inconsistency between the Xilinx XPS_MCH_EMC and the Atmel Flash part. In this case, flash_DQ_pin<0 - 15> represents the "1st" flash part and flash_DQ_pin<16 - 31> represents teh "2nd" flash part.
#* Note that the A pins are also in reverse order to overcome a Big Endian/Little Endian inconsistency.
<pre>
Net flash_DQ_pin<31> LOC=F24;
Net flash_DQ_pin<30> LOC=F25;
Net flash_DQ_pin<29> LOC=L17;
Net flash_DQ_pin<28> LOC=L18;
Net flash_DQ_pin<27> LOC=F23;
Net flash_DQ_pin<26> LOC=E24;
Net flash_DQ_pin<25> LOC=K18;
Net flash_DQ_pin<24> LOC=K19;
Net flash_DQ_pin<23> LOC=G22;
Net flash_DQ_pin<22> LOC=F22;
Net flash_DQ_pin<21> LOC=J20;
Net flash_DQ_pin<20> LOC=J19;
Net flash_DQ_pin<19> LOC=D26;
Net flash_DQ_pin<18> LOC=E26;
Net flash_DQ_pin<17> LOC=D24;
Net flash_DQ_pin<16> LOC=D25;
Net flash_DQ_pin<15> LOC=K26;
Net flash_DQ_pin<14> LOC=K25;
Net flash_DQ_pin<13> LOC=M22;
Net flash_DQ_pin<12> LOC=M21;
Net flash_DQ_pin<11> LOC=K22;
Net flash_DQ_pin<10> LOC=K23;
Net flash_DQ_pin<9> LOC=M18;
Net flash_DQ_pin<8> LOC=M19;
Net flash_DQ_pin<7> LOC=J22;
Net flash_DQ_pin<6> LOC=J23;
Net flash_DQ_pin<5> LOC=K21;
Net flash_DQ_pin<4> LOC=L22;
Net flash_DQ_pin<3> LOC=G24;
Net flash_DQ_pin<2> LOC=G23;
Net flash_DQ_pin<1> LOC=K20;
Net flash_DQ_pin<0> LOC=L20;
Net flash_A_pin<20> LOC=U20;
Net flash_A_pin<19> LOC=V21;
Net flash_A_pin<18> LOC=AA25;
Net flash_A_pin<17> LOC=AA24;
Net flash_A_pin<16> LOC=U18;
Net flash_A_pin<15> LOC=U19;
Net flash_A_pin<14> LOC=Y23;
Net flash_A_pin<13> LOC=Y22;
Net flash_A_pin<12> LOC=T20;
Net flash_A_pin<11> LOC=U21;
Net flash_A_pin<10> LOC=Y25;
Net flash_A_pin<9> LOC=Y24;
Net flash_A_pin<8> LOC=T17;
Net flash_A_pin<7> LOC=T18;
Net flash_A_pin<6> LOC=V22;
Net flash_A_pin<5> LOC=W23;
Net flash_A_pin<4> LOC=V25;
Net flash_A_pin<3> LOC=V24;
Net flash_A_pin<2> LOC=U22;
Net flash_A_pin<1> LOC=V23;
Net flash_A_pin<0> LOC=R20;
Net flash_WEN_pin LOC=U23;
Net flash_OEN_pin LOC=U24;
Net flash_CEN_pin LOC=R19;
Net flash_RPN_pin LOC=N21;
Net flash_Rdy_pin LOC=P22;
</pre>
[[Category:VHDL]]
[[Category:Microblaze]]
[[Category:EDK]]
